Start: April 17, 2019
End: April 17, 2019

Eurolab4HPC Workshop on Embedded Multicore Programming

This event, organized by the Eurolab4HPC project, in cooperation with HiPEAC and TETRAMAX, will address multicore programming issues within an informal and interactive workshop set-up. Registrations are limited and will be handled on a first-come, first-served basis. Participation is free of charge. Please note that people working at one of the Eurolab4HPC member institutions can ask for a travel cost reimbursement.

Informatics Forum, University of Edinburgh, April 17

The shift from single-core to multicore hardware platforms affects virtually all computing domains today. Multicore CPUs and heterogeneous system-on-chip platforms promise to meet skyrocketing application performance demands at moderate power and energy consumption. Yet, product quality requires more than powerful silicon chips. It is the software that makes the real difference. Suboptimal utilization of multicore hardware resources by the program code running on them is a bottleneck in many systems today. The times of simple von Neumann style sequential programming are gone – probably forever. Yet, manual parallelization of legacy software for complex multicores is extremely costly, risky, tedious, and error-prone. With exponentially growing complexity in both application software and hardware platforms, the challenges are here to stay.

Topics of interest

  • Multicore programming models
  • Target hardware architecture modeling
  • Sequential code parallelization
  • Software task mapping
  • Parallel target code generation
  • Performance/power co-optimization
  • Empirical results for specific application domains


  • 10:00- 10:15: "High-level language design for extensible accelerator programming", Tim Besard, University of Ghent
  • 10:15-10:30: "Parallelism Management under the Hood in the MECCA Project", Per Stenström, Chalmers University
  • 10:30-10:45: "gem5-X: A simulation framework for the optimization of many-core heterogeneous architectures", Marina Zapater, EPFL
  • 10:45 - 11:00: "Predictable execution on COTS Heterogeneous SoCs", Bjoern Forsberg, ETH Zurich

11:00- 11:30: Break

  • 11:30- 12:00: "Silexica SLX technology overview", Max Odendahl, Silexica Inc.
  • 12:00-12:15: "Vinetalk: hiding and exploiting compute node heterogeneity", Angelos Bilas , FORTH
  • 12:15-12:30: "Event-driven concurrent programming in POETS", David Thomas, Imperial College
  • 12:30-12:45: "Elastic multicore scheduling with the XiTAO runtime", Miquel Pericas, Chalmers University
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