Upcoming

Start: Jan. 21, 2019
End: Jan. 21, 2019

RISC-V Tutorial during the HiPEAC 19 conference

Eurolab4HPC could like to invite you to Valencia, for the <a href="https://www.hipeac.net/2019/valencia/#/">HiPEAC 19 conference </a>. We will be organizing a tutorial which provides an introduction to the Parallel Ultra Low Power (PULP) platform.

In this tutorial we will provide an introduction to the Parallel Ultra Low Power (PULP) platform. The entire project has been released as open source using the permissive SolderPad license and contains different platforms ranging from standalone single-core microcontrollers to more complex multi-cluster systems based on our own optimized implementation of the popular RISC-V processor cores.

Programme:

In this first part, we will give the background information on our RISC-V based PULP systems. The multi-core architectures have several special features (i.e. how to work with scratchpad memories), discussing why we have built them, and learning how to make best use of these features is important. Talks will be given by leading members of the PULP team.

The PULP project summary Understanding the RISC-V Architecture and SW Ecosystem RISC-V cores by the PULP team Multi-core systems of PULP Adding accelerators to PULP systems Programming PULP systems

Hands on Demonstration

In the second part we will use the PULP SDK to demonstrate how programs can be developed using the Open Heterogeneous Research Platform (HERO). In this part, we will use a VM image that will contain the PULP SDK as well as a virtual platform to develop and test programs.

We will also have various PULP platforms running on ASICs and FPGA platforms throughout the event.

All platforms that will be demonstrated in the talk are available as open source.

More information