Start: Oct. 28, 2019
End: Oct. 28, 2019

Eurolab4HPC Thematic Session: Programming models for upcoming supercomputers

Eurolab4HPC is organising a Eurolab4HPC Thematic Session on Programming models for upcoming supercomputers during HiPEAC’s CSW on Oct 28, 2019 - 14:00 - 17:30 in Bilbao.

The HPC community is working consciously toward building, supporting, and using exascale supercomputers (i.e., those capable of operating at a rate in the order of 10^18 floating point operations per second). There are big challenges associated with all of the three broad domains: hardware, software, and applications. Hardware support for exascale is widely expected to be accomplished by increased energy-friendly heterogeneity (i.e., specialised resources). This heterogeneity is no longer exclusive to processing elements (e.g., CPUs + accelerators), since modern memory hierarchies tend to expose a variety of explicitly-addressable memory subsystems composed of different technologies, such as Intel’s Optane technology. Another hardware-related challenge is a likely significant increase in the number of compute nodes when compared to current systems, which brings the potential for serious congestion problems due to the higher generated network traffic. These hardware-related challenges pose major implications in terms of the software layers, which tend to be under a heavier burden to hide the complexity of managing the hardware resources from the programmer. In this regard, while the system software community (including the programming models and runtime systems fields) has made considerable progress in providing more transparent support for managing large-scale deployments, the community is still far from attaining a highly efficient generic and portable support. Without this, application developers see themselves forced to implement low-level system-dependent strategies for efficiently exploiting the underlying resources, what is known as “ninja” programming. This practice, however, is known to be extremely inadvisable because it severely harms coding productivity, portability, performance portability, and code maintainability.

The objective of this thematic session is to be a forum for exchanging ideas among the European involved actors. To get started, this session, orchestrated by Eurolab4HPC, and organized by two H2020 projects working on advanced in this field, which will seek cross-polinization and collaboration opportunities: EPEEC and EPiGRAM-HS. Participants not related to these projects are more than welcome and highly encouraged to join, including all the members within the Eurolab4HPC community.

Eurolab4HPC Thematic Session: Programming models for upcoming supercomputers

-14:00-14:15 Welcome and Opening Remarks (Antonio J. Peña, BSC and Stefano Markidis, KTH)

-14:15-14:30 EPEEC’s Vision (Antonio J. Peña, BSC)

-14.30-14.45 EPiGRAM-HS’s Vision (Stefano Markidis, KTH)

-14:45-15:05 EPEEC’s Highly-Productive Resource Heterogeneity Management (Xavier Martorell, UPC, and BSC)

-15:05-15:25 EPEEC’s Highly-scalable Integrated Distributed Support (Valeria Bartsch, FRAUNHOFER)

-15:30-16:00 Break

-16:00-16:20 EPEEC’s Application Co-design (Tom Vander Aa, IMEC)

-16:20-16:40 EPIGRAM-HS - High-performance networks for extreme-scale heterogeneous systems (Daniel Holmes, EPCC)

-16:40-17:00 EPIGRAM-HS - How to support machine learning to benefit from FPGAs (Valeria Bartsch, FRAUNHOFER)

-17:00-17:30 Concluding Remarks and Future Steps (Antonio J. Peña, BSC and Stefano Markidis, KTH)

More information